Website

CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems

  • 2 active products

Consolidated Product Portfolio

  • Chisel

    Chisel: A Modern Hardware Design Language

    Hardware Lifecycle ManagementOpen Source
  • Verible

    Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

    Static Code AnalysisOpen Source

Company Profile & Strategy

Gemeinsame Hardware für Schnittstellen, Prozessoren und Systeme. Die CHIPS Alliance pflegt das Open-Source-Projekt Verible auf GitHub. Primäre Sprache: C++.

Open-Source Footprint

2 repositories6.7K stars
Visit organization GitHub

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